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Getting started with GP2X hardware hacking

From wiki.gp2x.org

Understanding this hardware in detail will take some time to unpick, document and play about with but for now this page exists to collect information on the chips used, board layout, pin-outs of ports, I/O information etc.


Hardware Documentation

A list of all the available documents containing information on GP2X's processors is at Hardware Documentation. This includes specifications for the ARM processor and the MagicEyes coprocessor.

See Also:

  • MP2520F: Main GP2X Processor information.
  • EXT Port Info on the external port on the bottom of the GP2X
  • TODO: Flesh out this section with more information on the hardware and cross-link into the existing WiKi topics in this area.

Output Ports

The GP2X has two main ports that can be used for communication:

  • High Speed USB Client port (miniUSB) on the side.
  • EXT port on the bottom.

The EXT port contains at least:

  • 1x 3.3V UART (possibly 2), these can be wired to a PC using a MAX3232 or similar.

See http://www.maxim-ic.com/quick_view2.cfm/qv_pk/1068/ln/en or How to create a serial cable.

  • 2x un-powered USB ports, these can be configured for 2x Host, or 1x Host, 1x Device mode.

See USB Host Mode for more information.

Custom Chips used in addition to the MP2520F SoC

The GP2X uses the PLX Technology NetChip 2272 IC for USB support. The NET2272 is a USB-function device, and as a result is a slave to the USB host.

It also uses a Conexant CX25784 for video output duties.

It uses 64MB of Samsung NAND memory (K9F1208) for the boot loader and Linux images.

Hacking Hardware


See Joystick PCB Layout and GPIO Reference

Clocks & Power

From Rob's GP2X pages (http://www.cobbleware.com/gp2x/ClockPower.html) :

The MMSP2 CPU has a fairly complicated clocking scheme, much like most embedded ARM devices these days. From the main crystal (7.3728MHz), it has 3 PLLs generating other frequencies. These are known as FPLL, UPLL, and APLL. FPLL is divided by programmable prescalers to produce A920TFCLK, A940TFCLK, and DCLK. The first two of these are obviously the CPU clock sources, it's very interesting that they can run at different rates. The last, DCLK, is the source for the memory controller clock.

Some information about changing the CPU Frequency


NAND memory is a persistent state serial memory cell used in the GP2X to hold the boot loader (stored in the first few hundred kilobytes) and Linux image. NAND memory is cheaper to produce than more traditional NOR memory due to the use of 1 less contact per pair of cells.

This memory can be overwritten by and used by normal user space programs provided appropriate access methods are configured, however using the NAND as a general storage area my be very unwise as SD/MMC cards are cheap and do less damage to your GP2X if they unfortunately fail.

Should large chunks of your NAND fail (beyond the ability of the hardware to map out the errors) you would be left with a useless GP2X. If your GP2X fails during an update to the boot loader stored on the NAND you would require the services of a JTAG device to bring your GP2X back from the edge of death.

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